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期刊


ISSN1549-8328
刊名IEEE Transactions on Circuits and Systems
参考译名IEEE电路与系统汇刊
收藏年代2007～2013

关联期刊参考译名收藏年代
IEEE Transactions on Circuits and SystemsIEEE电路与系统汇刊第一部分：基础理论与应用1998～2007


全部

2007 2008 2009 2010 2011 2012
2013

2012, vol.59, no.1 2012, vol.59, no.10 2012, vol.59, no.11 2012, vol.59, no.12 2012, vol.59, no.2 2012, vol.59, no.3
2012, vol.59, no.4 2012, vol.59, no.5 2012, vol.59, no.6 2012, vol.59, no.7 2012, vol.59, no.8 2012, vol.59, no.9

题名作者出版年年卷期
A 12.5-bit 4 MHz 13.8 mW MASH ΔΣ Modulator With Multirated VCO-Based ADCSamira Zaliasl; Saurabh Saxena; Pavan Kumar Hanumolu; Kartikeya Mayaram; Terri S. Fiez20122012, vol.59, no.8
A 75-dB SNDR, 5-MHz Bandwidth Stage-Shared 2-2 MASH ΔΣ Modulator Dissipating 16 mW PowerRamin Zanbaghi; Saurabh Saxena; Gabor C. Temes; Terri S. Fiez20122012, vol.59, no.8
Performance, Metastability, and Soft-Error Robustness Trade-offs for Flip-Flops in 40 nm CMOSDavid Rennie; David Li; Manoj Sachdev; Bharat L. Bhuva; Srikanth Jagannathan; ShiJie Wen; Richard Wong20122012, vol.59, no.8
Near Threshold Voltage Word-Line Voltage Injection Self-Convergence Scheme for Local Electron Injected Asymmetric Pass Gate Transistor 6T-SRAMKousuke Miyaji; Yasuhiro Shinozuka; Shinji Miyano; Ken Takeuchi20122012, vol.59, no.8
An At-Speed Test Technique for High-Speed High-order Adder by a 6.4-GHz 64-bit Domino Adder ExampleYu-Shun Wang; Min-Han Hsieh; James Chien-Mo Li; Charlie Chung-Ping Chen20122012, vol.59, no.8
A 40 nm 144 mW VLSI Processor for Real-Time 60-kWord Continuous Speech RecognitionGuangji He; Takanobu Sugahara; Yuki Miyamoto; Tsuyoshi Fujinaga; Hiroki Noguchi; Shintaro Izumi; Hiroshi Kawaguchi; Masahiko Yoshimoto20122012, vol.59, no.8
Linearity Enhancement Techniques in Radio Receiver Front-EndsRanjit Gharpurey20122012, vol.59, no.8
Passive Circuit Technologies for mm-Wave Wireless Systems on SiliconJohn R. Long; Yi Zhao; Wanghua Wu; Marco Spirito; Leonardo Vera; Edward Gordon20122012, vol.59, no.8
A 0.6-V Quadrature VCO With Enhanced Swing and Optimized Capacitive Coupling for Phase Noise ReductionFeng Zhao; Fa Foster Dai20122012, vol.59, no.8
A 4-GHz All Digital PLL With Low-Power TDC and Phase-Error CompensationJa-Yol Lee; Mi-Jeong Park; Byung-Hun Min; Seongdo Kim; Mun-Yang Park; Hyun-Kyu Yu20122012, vol.59, no.8
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