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期刊


ISSN1751-8601
刊名IET Computers & Digital Techniques
参考译名IET计算机与数字技术
收藏年代2007～2012

关联期刊参考译名收藏年代
IEE Proceedings英国电气工程师学会论文集：计算机与数字技术1999～2006


全部

2007 2008 2009 2010 2011 2012

2007, vol.1, no.1 2007, vol.1, no.2 2007, vol.1, no.3 2007, vol.1, no.4 2007, vol.1, no.5 2007, vol.1, no.6

题名作者出版年年卷期
Fully digital test solution for a set of ADCs and DACs embedded in a SIP or SOCV. Kerzerho; P. Cauvet; S. Bernard; F. Azais; M. Comte; M. Renovell20072007, vol.1, no.3
Flexible and scalable methodology for testing high-speed source synchronous interfaces on automated test equipment (ATE) with multiple fixed phase capture and compareB. Laquai; M. Braun; S. Walther; G. Schulze20072007, vol.1, no.3
Predicting mixed-signal dynamic performance using optimised signature-based alternate testB. Kim; H. Shin; J. -H. Chun; J. A. Abraham20072007, vol.1, no.3
Low-cost parametric test and diagnosis of RF systems using multi-tone response envelope detectionD. Han; S. Bhattacharya; A. Chatterjee20072007, vol.1, no.3
Deterministic logic BIST for transition fault testingV. Gherman; H. -J. Wunderlich; J. Schloeffel; M. Garbers20072007, vol.1, no.3
Improving high-level and gate-level testing with FATE: A functional automatic test pattern generator traversing unstabilised extended FSMG. Di Guglielmo; F. Fummi; C. Marconcini; G. Pravadelli20072007, vol.1, no.3
Wrapper design for the reuse of a bus, network-on-chip, or other functional interconnect as test access mechanismA. M. Amory; K. Goossens; E. J. Marinissen; M. Lubaszewski; F. Moraes20072007, vol.1, no.3
On-chip evaluation, compensation and storage of scan diagnosis dataF. Poehl; M. Beck; R. Arnold; J. Rzeha; T. Rabenalt; M. Goessel20072007, vol.1, no.3
Scan cell design for launch-on-shift delay tests with slow scan enableG. Xu; A. D. Singh20072007, vol.1, no.3
Enhancing delay fault coverage through low-power segmented scanZ. Zhang; S. M. Reddy; I. Pomeranz; J. Rajski; B. M. Al-Hashimi20072007, vol.1, no.3
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