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期刊


ISSN0913-5685
刊名電子情報通信学会技術研究報告
参考译名电子信息通信学会技术研究报告：电子装置
收藏年代2000～2022

关联期刊参考译名收藏年代
電子情報通信学会技術研究報告电子信息通信学会技术研究报告：电子装置 


全部

2000 2001 2002 2003 2004 2005
2006 2007 2008 2009 2010 2011
2012 2013 2014 2015 2016 2017
2018 2019 2020 2021 2022

2000, vol.100, no.1 2000, vol.100, no.147 2000, vol.100, no.148 2000, vol.100, no.149 2000, vol.100, no.2 2000, vol.100, no.235
2000, vol.100, no.236 2000, vol.100, no.265 2000, vol.100, no.266 2000, vol.100, no.305 2000, vol.100, no.306 2000, vol.100, no.318
2000, vol.100, no.370 2000, vol.100, no.405 2000, vol.100, no.406 2000, vol.100, no.505 2000, vol.100, no.506 2000, vol.100, no.547
2000, vol.100, no.548 2000, vol.100, no.549 2000, vol.100, no.57 2000, vol.100, no.58 2000, vol.100, no.641 2000, vol.100, no.642
2000, vol.100, no.683

题名作者出版年年卷期
Boosted gate MOS (BGMOS): leakage-free circuits by device/circuit cooperation schemeT. Inukai; M. Takamiya; K. Nose; H. Kawaguchi; T. Sakurai; T. Hiramoto20002000, vol.100, no.266
Feasibility study of the nonvolatile hall memoryYuji Okuto; Eigo Nishigami; Ai Katayama20002000, vol.100, no.266
Miniband structures for modulated superlattices with symmetric Gaussian potential profileKunihiko Asakura; Masakiyo Suzuki; Hirofumi Sanada; Nobuo Nagai20002000, vol.100, no.266
0.5-1 V 2-GHz RF front-end circuits in CMOS/SIMOXMitsuru Harada; Tsuneo Tsukahara; Jun-ichi Kodate; Akihiro Yamagishi; Junzo Yamada20002000, vol.100, no.266
3.5 Gbps CMOS/SIMOX transceiver with limiting amplifierMika Nishisaka; Kazuyoshi Nishimura; Yusuke Ohotomo20002000, vol.100, no.266
A highly manufacturable 0.18μm generation LOGIC technologyShuji Ikeda20002000, vol.100, no.266
Engineering model for DRAM refresh time predictionS. Kamohara; K. Kubota; M. Moniwa; K. Ohyu; A. Ogishima20002000, vol.100, no.266
A new substrate engineering technique to realize silicon on nothing (SON) structure utilizing surface migrationYoshitaka Tsunashima; Tsutomu Sato; Ichiro Mizushima20002000, vol.100, no.266
A novel atomic layer doping technology for ultra-shallow junction in sub-0.1μm MOSFETsK. -T. Park; J. -C. Bae; K. -W. Kow; H. Kurino; M. Koyanagi20002000, vol.100, no.266
Sub-0.1μm CMOS technology - elevated source/drain MOSFETsYuji Abe; Kohei Sugihara; Naruhisa Miura; Taisuke Furukawa; Katsuomi Shiozawa; Hirokazu Sasyma; Takumi Nakahata; Toshiyuki Oishi; Shigemitsu Maruno; Yasunori Tokuda20002000, vol.100, no.266
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